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 General information

 

Postal Address
(Letters)
TU Dresden
Vodafone Chair Mobile Communications Systems
01062 Dresden

(Parcels)
TU Dresden
Vodafone Chair Mobile Communications Systems
Helmholtzstr. 10
01069 Dresden

Visit Address
Office complex Falkenbrunnen
Chemnitzer Str. 50
2nd floor,
01187 Dresden

Staff Staff
 

 FlashStaffWebpart

 

Dr. Emil Matus

Details

Postal Address
(Letters)
TU Dresden
Vodafone Chair Mobile Communications Systems
01062 Dresden

(Parcels)
TU Dresden
Vodafone Chair Mobile Communications Systems
Helmholtzstr. 10
01069 Dresden

Visit Address
Office complex Falkenbrunnen
Chemnitzer Str. 50
2nd floor, Room 231
01187 Dresden

Phone: +49 351 463 41021

Fax: +49 351 463 41 099

E-Mail: matus@ifn.et.tu-dresden.de

Courses

Journal Publications

  • Y. Chen, E. Matus and G. Fettweis
  • High Performance Dynamic Resource Allocation for Guaranteed Service in Network-on-Chips

  • in IEEE Transactions on Emerging Topics in Computing (TETC), 2017
  • O. Arnold, E. Matus, B. Nöthen, M. Winter, T. Limberg and G. Fettweis
  • Tomahawk - Parallelism and Heterogeneity in Communications Signal Processing MPSoCs

  • in ACM Transactions on Embedded Computing Systems (TECS), 2013
  • » download paper

Conference/Workshop Publications

  • G. Fettweis and E. Matus
  • Scalable 5G MPSoC Architecture

  • in Proceedings of the 51st Annual Asilomar Conference on Signals, Systems, and Computers (ASILOMAR'17), Pacific Grove, California, 29.10. - 1.11.2017
  • invited paper
  • » download paper
  • Y. Chen, E. Matus and G. Fettweis
  • Combined TDM and SDM Circuit Switching NoCs with Dedicated Connection Allocator

  • in Proceedings of the ISVLSI'17 IEEE Annual Symposium on VLSI (ISVLSI'17), Bochum, Germany, 3.7. - 5.7.2017
  • » download paper
  • S. Haas, T. Seifert, B. Nöthen, S. Scholze, S. Höppner, A. Dixius, E. Pérez Adeva, T. Augustin, F. Pauls, S. Moriam, M. Hasler, E. Fischer, Y. Chen, E. Matus, G. Ellguth, S. Hartmann, S. Schiefer, L. Cederstroem, D. Walter, S. Henker, S. Hänzsche, J. Uhlig, H. Eisenreich, S. Weithoffer, N. Wehn, R. Schüffny, C. Mayr and G. Fettweis
  • A Heterogeneous SDR MPSoC in 28 nm CMOS for Low-Latency Wireless Applications

  • in Proceedings of the Design Automation Conference (DAC'17), Austin/Texas, 18.6. - 22.6.2017
  • » download paper
  • Y. Chen, E. Matus and G. Fettweis
  • Combined Packet and TDM Circuit Switching NoCs with Novel Connection Configuration Mechanism

  • in Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS'17), Baltimore, USA, 28.5. - 31.5.2017
  • » download paper
  • Y. Chen, E. Matus and G. Fettweis
  • Combined Centralized and Distributed Connection Allocation in Large TDM Circuit Switching NoCs

  • in Proceedings of the ACM GLSVLSI (GLSVLSI'17), Banff, Alberta, Canada, 10.5. - 12.5.2017
  • » download paper
  • Y. Chen, E. Matus and G. Fettweis
  • Register-Exchange based Connection Allocator for Circuit Switching NoCs

  • in Proceedings of the The 25th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP'17), St. Petersburg, Russia, 6.3. - 8.3.2017
  • » download paper» download paper
  • S. Haas, O. Arnold, S. Scholze, S. Höppner, G. Ellguth, A. Dixius, A. Ungetuehm, E. Mier, B. Nöthen, E. Matus, S. Schiefer, L. Cederstroem, F. Pilz, C. Mayr, R. Schüffny, W. Lehner and G. Fettweis
  • A Database Accelerator for Energy-Efficient Query Processing and Optimization

  • in Proceedings of the Nordic Circuits and Systems Conference (NORCAS'16), Copenhagen, Danmark, 1.11. - 2.11.2016
  • » download paper
  • S. Haas, O. Arnold, B. Nöthen, S. Scholze, G. Ellguth, A. Dixius, S. Höppner, S. Schiefer, S. Hartmann, S. Henker, T. Hocker, J. Schreiter, H. Eisenreich, J. Schlüssler, D. Walter, T. Seifert, F. Pauls, M. Hasler, Y. Chen, H. Hensel, S. Moriam, E. Matus, C. Mayr, R. Schüffny and G. Fettweis
  • An MPSoC for Energy-Efficient Database Query Processing

  • in Proceedings of the Design Automation Conference (DAC'16), Austin/Texas, USA, 5.6. - 9.6.2016
  • » download paper
  • Y. Chen, E. Matus and G. Fettweis
  • Trellis-search based Dynamic Multi-Path Connection Allocation for TDM-NoCs

  • in Proceedings of the ACM GLSVLSI (GLSVLSI'16), Boston, Massachusetts, U.S.A., 18.5. - 20.5.2016
  • » download paper
  • Y. Chen, E. Matus and G. Fettweis
  • Centralized Parallel Multi-path Multi-Slot Allocation Approach for TDM NoCs

  • in Proceedings of the THE 29TH ANNUAL IEEE CANADIAN CONFERENCE ON ELECTRICAL AND COMPUTER ENGINEERING (CCECE'16), VANCOUVER, CANADA, 15.5. - 18.5.2016
  • » download paper
  • S. Haas, E. Matus and G. Fettweis
  • An MPSoC for Energy-Efficient Query Processing

  • in Proceedings of the Tensilica User Day (TensilicaDay'16), Hannover, 9.2. - 9.2.2016
  • » download paper
  • B. Nöthen, O. Arnold, E. Pérez Adeva, T. Seifert, E. Fischer, S. Kunze, E. Matus, G. Fettweis, H. Eisenreich, G. Ellguth, S. Höppner, S. Hartmann, S. Schiefer, J. Schlüssler, S. Scholze, D. Walter and R. Schüffny
  • A 105GOPS 36mm2 Heterogeneous SDR MPSoC with Energy-Aware Dynamic Scheduling and Iterative Detection-Decoding for 4G in 65nm CMOS

  • in Proceedings of the International Solid-State Circuits Conference (ISSCC'14), San Francisco, CA, 9.2. - 12.2.2014
  • » download paper
  • O. Arnold, E. Matus, B. Nöthen, F. Pauls and G. Fettweis
  • Towards Elastic SDR Architectures Using Dynamic Task Management

  • in Proceedings of the Global Conference on Signal and Information Processing (GlobalSIP'13), Austin, Texas, U.S.A., 3.12. - 5.12.2013
  • » download paper
  • M. Jar, E. Matus, E. Pérez Adeva, E. Ohlmer and G. Fettweis
  • Two-Stage Detector for SC-FDMA Transmission over MIMO ISI Channels

  • in Proceedings of the 9th International Symposium on Wireless Communication Systems (ISWCS'12), Paris, France, 28.8. - 31.8.2012
  • » download paper
  • M. Winter, S. Kunze, E. Pérez Adeva, B. Mennenga, E. Matus, G. Fettweis, H. Eisenreich, G. Ellguth, S. Höppner, S. Scholze, R. Schüffny and T. Kobori
  • A 335Mb/s 3.9mm² 65nm CMOS Flexible MIMO Detection-Decoding Engine Achieving 4G Wireless Data Rates

  • in Proceedings of the 59th International Solid-State Circuits Conference (ISSCC'12), San Francisco, USA, 19.2. - 23.2.2012
  • » download paper
  • S. Kunze, E. Matus, G. Fettweis and T. Kobori
  • Combining LDPC, Turbo and Viterbi Decoders: Benefits and Costs

  • in Proceedings of the SIPS IEEE Workshop on Signal Processing Systems (SIPS'11), Beirut, Lebanon, 4.10. - 7.10.2011
  • » download paper
  • S. Kunze, T. Kobori, E. Matus and G. Fettweis
  • A ”Multi-User” Approach towards a Channel Decoder for Convolutional, Turbo and LDPC Codes

  • in Proceedings of the SIPS IEEE Workshop on Signal Processing Systems (SIPS'11), Beirut, Lebanon, 4.10. - 7.10.2011
  • » download paper
  • M. Bimberg, E. Matus and G. Fettweis
  • On the Performance and Numerical Stability of Soft-decision Reed-Solomon decoding

  • in Proceedings of the 17th European Signal Processing Conference (EUSIPCO'09), Glasgow, Scotland, 24.8. - 28.8.2009
  • » download paper
  • T. Limberg, M. Winter, M. Bimberg, R. Klemm, M. B. Tavares, H. Ahlendorf, E. Matus, G. Fettweis, H. Eisenreich, G. Ellguth and J. Schlüssler
  • A Heterogeneous MPSoC with Hardware Supported Dynamic Task Scheduling for Software Defined Radio

  • in Proceedings of the 46th Design Automation Conference (DAC'09), San Francisco, USA, 26.7. - 31.7.2009
  • » download paper
  • M. B. Tavares, E. Matus and G. Fettweis
  • On the Structured Parallelism of Decoders for LDPC Convolutional Codes – An Algebraic Description

  • in Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS'09), Taipei, Taiwan, 24.5. - 27.5.2009
  • » download paper
  • B. Mennenga, E. Matus and G. Fettweis
  • Vectorization of the Sphere Detection Algorithm

  • in Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS'09), Taipei, Taiwan, 24.5. - 27.5.2009
  • » download paper
  • E. Matus, T. Limberg, M. Winter, M. Bimberg, R. Klemm, M. B. Tavares, H. Ahlendorf and G. Fettweis
  • Multi-Processor SDR Platform with HW Supported Dynamic Scheduling

  • in Proceedings of the 12th IEEE Symposium on Low-Power and High-Speed Chips (COOLCHIPS'09), Yokohama, Japan, 15.4. - 17.4.2009
  • » download paper
  • T. Limberg, M. Winter, M. Bimberg, R. Klemm, E. Matus, M. B. Tavares, G. Fettweis, H. Ahlendorf and P. Robelly
  • A Fully Programmable 40 GOPS SDR Single Chip Baseband for LTE/WiMAX Terminals

  • in Proceedings of the 34th European Solid-State Circuit Conference (ESSCIRC'08), Edinburgh, UK, 15.9. - 19.9.2008
  • » download paper
  • M. B. Tavares, S. Kunze, E. Matus and G. Fettweis
  • Architecture and VLSI Realization of a High-Speed Programmable Decoder for LDPC Convolutional Codes

  • in Proceedings of the 19th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP'08), Leuven, Belgium, 2.7. - 4.7.2008
  • » download paper
  • M. B. Tavares, E. Matus, S. Kunze and G. Fettweis
  • A Dual-Core Programmable Decoder for LDPC Convolutional Codes

  • in Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS'08), Seattle, USA, 18.5. - 21.5.2008
  • » download paper
  • M. Bimberg, M. B. Tavares, E. Matus and G. Fettweis
  • A High-Throughput Programmable Decoder for LDPC Convolutional Codes

  • in Proceedings of the 18th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP'07), Montreal, Canada, 9.7. - 11.7.2007
  • » download paper
  • E. Matus, M. B. Tavares, M. Bimberg and G. Fettweis
  • Towards a GBit/s Programmable Decoder for LDPC Convolutional Codes

  • in Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS'07), New Orleans, USA, 27.5. - 30.5.2007
  • » download paper
  • M. B. Tavares, E. Matus, M. Bimberg and G. Fettweis
  • A Programmable Decoder for LDPC Convolutional Codes: From Graph Properties to Hardware Realization

  • in Proceedings of the IEEE Communications Theory Workshop (CTW'07), Sedona, USA, 20.5. - 23.5.2007
  • » download paper
  • E. Matus, H. Seidel, T. Limberg, P. Robelly and G. Fettweis
  • A GFLOPS Vector-DSP for Broadband Wireless Applications

  • in Proceedings of the IEEE Custom Integrated Circuits Conference (CICC'06), San Jose, USA, 11.9. - 13.9.2006
  • » download paper
  • J. Guo, T. Limberg, E. Matus, B. Mennenga, R. Klemm and G. Fettweis
  • Code Generation for STA Architecture

  • in Proceedings of the 12th European Conference on Parallel Computing (VTCFALL'06), Dresden, Germany, 29.8. - 1.9.2006
  • » download paper
  • T. Limberg, E. Matus, H. Seidel and G. Fettweis
  • On Design of High Performance Vector Math Coprocesors for Mobile Appications: SAMIRA Case Study

  • in Proceedings of the Dresdner Arbeitstagung Schaltungs- und Systementwurf (DASS'06), Dresden, Germany, 10.5. - 11.5.2006
  • » download paper
  • T. Schuster, B. Bougard, D. Novo Bruna, E. Matus, L. Van der Perre and G. Fettweis
  • An exploration methodology for VLIW architectures targeting multimode wireless baseband processing

  • in Proceedings of the IEEE BENELUX/DSP Valley Signal Processing Symposium (DSP'06), Antwerpen, Belgium, 28.3. - 29.3.2006
  • » download paper
  • H. Seidel, E. Matus, T. Limberg, G. Fettweis, G. Cichon and P. Robelly
  • Development and Implementation of a 3.6 GFLOP/s SIMD-DSP using the Synopsys Toolchain

  • in Proceedings of the 14th Synopsis User Group Conference (SNUG'05), Munich, Germany, 3.5. - 4.5.2005
  • » download paper
  • H. Seidel, G. Cichon, P. Robelly, E. Matus and G. Fettweis
  • SFB358-A6 demonstrator: HW/SW co-design of a DVB-T receiver

  • in Proceedings of the 4th IEEE International Conference on Parallel Computing in Electrical Engineering (PARELEC'04), Dresden, Germany, 7.9. - 10.9.2004
  • » download paper
  • G. Cichon, P. Robelly, H. Seidel, E. Matus, M. Bronzel and G. Fettweis
  • SAMIRA: A SIMD-DSP architecture targeted to the Matlab source language

  • in Proceedings of the Global Signal Processing Expo & Conference (GSPx'04), Santa Clara, USA, 27.7. - 30.7.2004
  • » download paper
  • H. Seidel, G. Cichon, P. Robelly, E. Matus and G. Fettweis
  • Generated DSP cores for implementation of an OFDM communication system

  • in Proceedings of the 4th International Workshop on Systems, Architectures, MOdeling, and Simulation (SAMOS'04), Samos, Greece, 19.7. - 21.7.2004
  • » download paper
  • G. Cichon, P. Robelly, H. Seidel, E. Matus, M. Bronzel and G. Fettweis
  • Synchronous transfer architecture (STA)

  • in Proceedings of the 4th International Workshop on Systems, Architectures, MOdeling, and Simulation (SAMOS'04), Samos, Greece, 19.7. - 21.7.2004
  • » download paper
  • E. Matus, O. Prätor, A. Zoch, G. Cichon and G. Fettweis
  • Software Reconfigurable Baseband ASSP for Dual Mode UMTS/WLAN 802.11b Receiver

  • in Proceedings of the 13th IST Mobile & Wireless Communications Summit (IST Summit'04), Lyon, France, 27.6. - 30.6.2004
  • » download paper